John Ledford
421 Woodring Rd., Lecompton, KS 66050-9501
Home: (785) 379-8860
john.NOSPAM@remove_this.kookypeople.com



Marker Pin Work Experience

2001-Present Hardware Engineer, Instrumentation Design Labratory, University of Kansas, Lawrence, Kansas.
Research, design, build, test, document, and then deliver the instruments and circuits for various research groups on campus. Job included making devices that enabled physical sciences research.

Sample projects include



1999-2001 Member of Technical Staff, Nexus Applied Research / ThinRoute Technologies, Auburn, CA.
Researched, architected, and implemented a 2 or 8 channel digital loop carrier system using a 2.4 GHz spread spectrum radio modem with a synchronous EIA 530 interface. Worked with DSP-based CODECs to implement high quality voice transmission over a fixed point wireless system.


1996-2000 Staff Engineer, PairGain Technologies (now ADC Telecommunications), Raleigh, NC.
General hardware engineer. Researched, architected, and implemented an EBS (P-Phone) service for the PG-Plus small subscriber digital loop carrier system.



1996 Research Assistant, Electric Power Research Center at North Carolina State University.
Researched and designed electronic circuit to provide voltage sag and line drop-out protection for contactors.



1994-1995 Core HW Engineer (Cooperative Education) - Alcatel Network Systems, Raleigh, NC.
Designed FPGA circuit to facilitate the emulation of an ASIC to be used in SONET OC-12 applications.



1992 Design Engineer (Cooperative Education) - Bell Northern Research (now Nortel), Research Triangle Park, NC.
Assisted engineers in the design, test, and verification of analog circuits. Worked with linear power supply design and fault testing.



Marker Pin Education

BSEE received May 1995, North Carolina State University, Raleigh, North Carolina.
Overall GPA 3.2 of 4.0; Major GPA 3.8 of 4.0

MSEE in progress, University of Kansas, Lawrence, Kansas.
GPA 4.0 of 4.0



Marker Pin Skills

Hardware
System / Concept Design and Execution, FPGA design, PLD design, embedded microcontrollers, digital hardware, voice interfacing chips, DC/DC switching power supplies, and some analog circuitry.

Software
Syplicity Synplify, Cadence NC VHDL simulator, OrCad Express Plus VHDL simulation and Synthesis, Cadence Verilog XL simulator, Viewlogic Schematics, OrCad Schematics, Cadence Schematics, Model Technologies Verilog simulator, Exemplar Leonardo Verilog Synthesis, P-Spice, Xilinx tools, various assemblers and simulators, DOS / Windows, MS-Office tools, and various UNIX tools, platforms and scripting languages. Some minor C and C++ programming.



Marker Pin Publications & Patent

A. Kelley J. Cavaroc, J. Ledford, L. Vasalli, "Voltage Regulator for Contactor Ridethrough," IEEE Transactions on Industry Applications, Vol. 36, No. 2, March/April 2000, pp. 697-704.

Paper won best paper prize and a patent on this work was filed but no funds were found to pay for it.



Marker Pin References

Ask me for them and their all yours!