John Ledford
421 Woodring Rd., Lecompton, KS 66050-9501
Home: (785) 379-8860
john.NOSPAM@remove_this.kookypeople.com
Work Experience
2001-Present Hardware Engineer, Instrumentation Design Labratory, University of Kansas, Lawrence, Kansas.
Research, design, build, test, document, and then deliver the instruments and circuits for various research groups on campus. Job included making devices that enabled physical sciences research.
Sample projects include
- Motor Control Project
- 30,000 Volt Power Supply
- Palm Keyboard
- 2,000 Volt Power Supply from USB Port
- Stimulus Adapter Board for DZero Project of Fermi National Accelerator Labs
- Hardware Surface Veto
- Custom Scan Controller
1999-2001 Member of Technical Staff, Nexus Applied Research / ThinRoute Technologies, Auburn, CA.
Researched, architected, and implemented a 2 or 8 channel digital loop carrier system using a 2.4 GHz spread spectrum radio modem with a synchronous EIA 530 interface. Worked with DSP-based CODECs to implement high quality voice transmission over a fixed point wireless system.
- Hardware architecture
- Detailed hardware design and debug
- PCB layout for 4 boards
- Digital: embedded processors, DUART / RS232 interfaces, RS-485 communications, FPGA
- Analog: battery charger, voice interface, ringing voltage supply, power supply
- FPGA: designed using VHDL implemented in Xilinx Spartan XCS30XL part
- transmit and receive framer and data path
- microprocessor interface and auxiliary functions
- timing-based synthesis and place & route
- synchronous design (except processor)
- Design and customer documentation
1996-2000 Staff Engineer, PairGain Technologies (now ADC Telecommunications), Raleigh, NC.
General hardware engineer. Researched, architected, and implemented an EBS (P-Phone) service for the PG-Plus small subscriber digital loop carrier system.
- General hardware engineer
- Power supply designs included:
- 25W flyback, 92% efficient, -48V to isolated +135V supply
- 9W flyback, 76% efficient, 140-270V input, isolated 5V output supply
- Assisted in team design / testing parts of many cards
- Detailed hardware design and debug of one card in system
- PCB design and layout
- CODEC and SLIC voice interface design
- Industrial temperature range, 20 year life expectancy, strict regulatory approval, compliant with several standards
- 10K gate FPGA: designed using Verilog HDL, implemented in a Xilinx 4010XL
- Implement full communication protocol for EBS system
- Function similar to UART (8 kHz tone modulated at 1 kHz)
- Control tone generator and complex receiver/decoder
- Microprocessor interface and I/O ports
- Multiple transmitter environment
- Designed for manufacturability and worked closely with manufacturing in initial production stage.
1996 Research Assistant, Electric Power Research Center at North Carolina State University.
Researched and designed electronic circuit to provide voltage sag and line drop-out protection for contactors.
- New variation of switching regulator and contactor
- Goal of easy scalability from 120V AC to 480V and large contactors
- Best paper prize at IEEE conference
- Patent filed on work, but no funding was found to pay for it
1994-1995 Core HW Engineer (Cooperative Education) - Alcatel Network Systems, Raleigh, NC.
Designed FPGA circuit to facilitate the emulation of an ASIC to be used in SONET OC-12 applications.
- 30K gate FPGA: designed using Verilog HDL, implemented in an array of Xilinx 4010 parts.
- Microprocessor interface
- User provisionable, flexible test pattern generator and pattern receiver
- Error detection and reporting
- Emulated various ASIC circuitry
1992 Design Engineer (Cooperative Education) - Bell Northern Research (now Nortel), Research Triangle Park, NC.
Assisted engineers in the design, test, and verification of analog circuits. Worked with linear power supply design and fault testing.
Education
BSEE received May 1995, North Carolina State University, Raleigh, North Carolina.
Overall GPA 3.2 of 4.0; Major GPA 3.8 of 4.0
MSEE in progress, University of Kansas, Lawrence, Kansas.
GPA 4.0 of 4.0
Skills
Hardware
System / Concept Design and Execution, FPGA design, PLD design, embedded microcontrollers, digital hardware, voice interfacing chips, DC/DC switching power supplies, and some analog circuitry.
Software
Syplicity Synplify, Cadence NC VHDL simulator, OrCad Express Plus VHDL simulation and Synthesis, Cadence Verilog XL simulator, Viewlogic Schematics, OrCad Schematics, Cadence Schematics, Model Technologies Verilog simulator, Exemplar Leonardo Verilog Synthesis, P-Spice, Xilinx tools, various assemblers and simulators, DOS / Windows, MS-Office tools, and various UNIX tools, platforms and scripting languages. Some minor C and C++ programming.
Publications & Patent
A. Kelley J. Cavaroc, J. Ledford, L. Vasalli, "Voltage Regulator for Contactor Ridethrough,"
IEEE Transactions on Industry Applications, Vol. 36, No. 2, March/April 2000, pp. 697-704.
Paper won best paper prize and a patent on this work was filed but no funds were found to pay for it.
References
Ask me for them and their all yours!